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Setup fs register according to the ELF TLS handling manual for x86-64
According to the ELF runtime handling of TLS document, the x86-64 arch uses the same TLS handling variant (GNU) as the IA-32 ABI with the exception that pointers are 8-byte wide and that the gs register is swapped with fs. fs:0x0 points to the TCB; TLS variables are located before it and are accessed using negative offsets from the TCB pointer. In the Go case the G struct is accessed at fs:-0x8. For more detauls see: https://www.akkadia.org/drepper/tls.pdf
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@ -20,9 +20,12 @@ _rt0_idt_desc:
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; Allocates space for the IRQ handlers pointers registered by the IRQ package
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; Allocates space for the IRQ handlers pointers registered by the IRQ package
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_rt0_irq_handlers resq IDT_ENTRIES
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_rt0_irq_handlers resq IDT_ENTRIES
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; The FS register is loaded with the address of r0_g_ptr. fs:0x00 should contain
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; According to the "ELF handling for TLS" document section 3.4.6
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; a pointer to the currently active g struct (in this case runtime.g0)
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; (https://www.akkadia.org/drepper/tls.pdf) for the GNU variant for x86-64,
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r0_g_ptr: resq 1
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; fs:0x00 contains a pointer to the TCB. Variables in the TLS are stored
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; before the TCB and are accessed using negative offsets from the TCB address.
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r0_g_ptr: resq 1
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tcb_ptr: resq 1
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section .text
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section .text
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@ -97,17 +100,16 @@ _rt0_64_setup_go_runtime_structs:
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mov rax, r0_g_ptr
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mov rax, r0_g_ptr
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mov qword [rax], rsi
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mov qword [rax], rsi
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; According to the x86_64 ABI, the fs register should contain the
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; According to the x86-64 ABI requirements fs:0x0 should point to the
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; address after the pointer to the pointer to the user-space thread
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; TCB.
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; structure. This allows the Go runtime to retrieve the address of
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mov rax, tcb_ptr
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; the currently active g structure by accessing fs:-0x8.
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mov qword [rax], rax
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;
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; Load 64-bit FS register address
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; Load 64-bit FS register address
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; eax -> lower 32 bits
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; eax -> lower 32 bits
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; edx -> upper 32 bits
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; edx -> upper 32 bits
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mov ecx, 0xc0000100 ; fs_base
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mov ecx, 0xc0000100 ; fs_base
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mov rsi, r0_g_ptr
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mov rsi, tcb_ptr
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add rsi, 8 ; fs -> r0_g_ptr + 0x8
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mov rax, rsi ; lower 32 bits
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mov rax, rsi ; lower 32 bits
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shr rsi, 32
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shr rsi, 32
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mov rdx, rsi ; high 32 bits
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mov rdx, rsi ; high 32 bits
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